Issued Patents All Time
Showing 101–124 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4597062 | Non-volatile semiconductor memory system | Masamichi Asano | 1986-06-24 |
| 4593203 | Semiconductor integrated circuit which allows adjustment of circuit characteristics in accordance with storage data of nonvolatile memory element | Masamichi Asano | 1986-06-03 |
| 4571706 | Semiconductor memory device | Shoji Ariizumi | 1986-02-18 |
| 4556961 | Semiconductor memory with delay means to reduce peak currents | Masamichi Asano | 1985-12-03 |
| 4546455 | Semiconductor device | Kiyofumi Ochii | 1985-10-08 |
| 4542485 | Semiconductor integrated circuit | Masamichi Asano | 1985-09-17 |
| 4528646 | Semiconductor memory with selectively enabled precharge and sense amplifier circuits | Kiyofumi Ochii | 1985-07-09 |
| 4509148 | Semiconductor memory device | Masamichi Asano | 1985-04-02 |
| 4506350 | Non-volatile semiconductor memory system | Masamichi Asano | 1985-03-19 |
| 4503518 | Semiconductor IC memory | — | 1985-03-05 |
| 4495693 | Method of integrating MOS devices of double and single gate structure | Masamichi Asano, Kuniyoshi Yoskikawa, Masazi Mito | 1985-01-29 |
| 4477884 | Semiconductor memory with improved data programming time | Masamichi Asano | 1984-10-16 |
| 4473762 | Semiconductor integrated circuit with a response time compensated with respect to temperature | Masamichi Asano | 1984-09-25 |
| 4467457 | Nonvolatile semiconductor memory device | Masamichi Asano | 1984-08-21 |
| 4453174 | Semiconductor integrated circuit device with non-volatile semiconductor memory cells and means for relieving stress therein | Yuichi Kawasaki, Sumio Tanaka, Masamichi Asano, Shinichi Maekawa, Masazi Mito | 1984-06-05 |
| 4447895 | Semiconductor memory device | Masamichi Asano | 1984-05-08 |
| 4445203 | Memory device | — | 1984-04-24 |
| 4425632 | Nonvolatile semiconductor memory device | Masamichi Asano | 1984-01-10 |
| 4395724 | Nonvolatile semiconductor memory device | Masamichi Asano | 1983-07-26 |
| 4385337 | Circuit including an MOS transistor whose gate is protected from oxide rupture | Masamichi Asano, Ichiro Kobayashi | 1983-05-24 |
| 4365316 | Multifunction terminal circuit | Masamichi Asano | 1982-12-21 |
| 4340943 | Memory device utilizing MOS FETs | Masamichi Asano | 1982-07-20 |
| 4247918 | Electrically alterable nonvolatile memory | Shoji Ariizumi | 1981-01-27 |
| 4185321 | Semiconductor memory with pulse controlled column load circuit | Seigo Suzuki | 1980-01-22 |