Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7916632 | Systems and methods for handling packet fragmentation | Raymond Marcelino Manese Lim | 2011-03-29 |
| 7859999 | Memory load balancing for single stream multicast | Debashis Basu, Avanindra Godbole, Raymond Marcelino Manese Lim | 2010-12-28 |
| 7782857 | Logical separation and accessing of descriptor memories | Raymond Marcelino Manese Lim | 2010-08-24 |
| 7773599 | Packet fragment handling | Raymond Marcelino Manese Lim | 2010-08-10 |
| 7710994 | Systems and methods for efficient multicast handling | Pradeep Sindhu, Debashis Basu, Pankaj Patel, Raymond Marcelino Manese Lim, Avanindra Godbole +5 more | 2010-05-04 |
| 7680116 | Optimized buffer loading for packet header processing | Raymond Marcelino Manese Lim | 2010-03-16 |
| 7616562 | Systems and methods for handling packet fragmentation | Raymond Marcelino Manese Lim | 2009-11-10 |
| 7292529 | Memory load balancing for single stream multicast | Debashis Basu, Avanindra Godbole, Raymond Marcelino Manese Lim | 2007-11-06 |
| 7289503 | Systems and methods for efficient multicast handling | Pradeep Sindhu, Debashis Basu, Pankaj Patel, Raymond Marcelino Manese Lim, Avanindra Godbole +5 more | 2007-10-30 |
| 7283528 | On the fly header checksum processing using dedicated logic | Raymond Marcelino Manese Lim | 2007-10-16 |
| 7239630 | Dedicated processing resources for packet header generation | Raymond Marcelino Manese Lim | 2007-07-03 |
| 7240347 | Systems and methods for preserving the order of data | Raymond Marcelino Manese Lim, Stefan Dyckerhoff, Teshager Tesfaye | 2007-07-03 |
| 7236501 | Systems and methods for handling packet fragmentation | Raymond Marcelino Manese Lim | 2007-06-26 |
| 7215662 | Logical separation and accessing of descriptor memories | Raymond Marcelino Manese Lim | 2007-05-08 |
| 7212530 | Optimized buffer loading for packet header processing | Raymond Marcelino Manese Lim | 2007-05-01 |
| 7180893 | Parallel layer 2 and layer 3 processing components in a network router | Pradeep Sindhu, Raymond Marcelino Manese Lim | 2007-02-20 |
| 7158520 | Mailbox registers for synchronizing header processing execution | Pradeep Sindhu, Raymond Marcelino Manese Lim | 2007-01-02 |
| 7082134 | Redirect checking in a network device | Raymond Marcelino Manese Lim, Dennis C. Ferguson | 2006-07-25 |
| 6941433 | Systems and methods for memory read response latency detection | Raymond Marcelino Manese Lim | 2005-09-06 |
| 6564277 | Method and system for handling interrupts in a node controller without attached processors | John Keen, Swaminathan Venkataraman | 2003-05-13 |