Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7969806 | Systems and methods for writing to a memory | Jens Egerer, Peter Schroegmeier | 2011-06-28 |
| 7864593 | Method for classifying memory cells in an integrated circuit | Andreas Taeuber, Detlev Richter, Konrad Seidel, Robert Petter, Marco Ziegelmayer | 2011-01-04 |
| 7783826 | Data bus width converter | Andreas Taeuber, Detlev Richter, Rainer Spielberg | 2010-08-24 |
| 7707380 | Memories, method of storing data in memory and method of determining memory cell sector quality | Rainer Spielberg, Detlev Richter, Andreas Taeuber | 2010-04-27 |
| 7355908 | Nonvolatile storage device and self-redundancy method for the same | Carmelo Condemii | 2008-04-08 |
| 7355468 | Voltage generator circuit, method for providing an output voltage and electronic memory device | Giacomo Curatolo | 2008-04-08 |
| 7295477 | Semiconductor memory device and method for writing data into the semiconductor memory device | Thomas Kern | 2007-11-13 |
| 7259993 | Reference scheme for a non-volatile semiconductor memory device | Marco Redaelli | 2007-08-21 |
| 7190621 | Sensing scheme for a non-volatile semiconductor memory cell | Marco Redaelli | 2007-03-13 |
| 7187589 | Non-volatile semiconductor memory and method for writing data into a non-volatile semiconductor memory | Francesco Brani | 2007-03-06 |
| 7050343 | Built-in testing methodology in flash memory | Promod Kumar, Francesco Tomaiuolo, Pierpaolo Nicosia, Francesco Pipitone | 2006-05-23 |
| 6801466 | Circuit for controlling a reference node in a sense amplifier | Salvatore Giove, Salvatore Nicosia, Francesco Tomaiulo, Kumar Promod, Giuseppe Piazza +1 more | 2004-10-05 |
| 6624679 | Stabilized delay circuit | Francesco Tomaiuolo, Fabrizio Campanale, Salvatore Nicosia, Promod Kumar | 2003-09-23 |
| 6625706 | ATD generation in a synchronous memory | Fabrizio Campanale, Salvatore Nicosia, Francesco Tomaiuolo, Promod Kumar | 2003-09-23 |
| 6587913 | Interleaved memory device for burst type access in synchronous read mode with the two semi-arrays independently readable in random access asynchronous mode | Fabrizio Campanale, Salvatore Nicosia, Francesco Tomaiuolo, Promod Kumar, Luigi Pascucci | 2003-07-01 |
| 6487140 | Circuit for managing the transfer of data streams from a plurality of sources within a system | Francesco Tomaiuolo, Fabrizio Campanale, Salvatore Nicosia, Promod Kumar | 2002-11-26 |
| 6473339 | Redundancy architecture for an interleaved memory | Fabrizio Campanale, Salvatore Nicosia, Francesco Tomaiuolo, Promod Kumar | 2002-10-29 |
| 6470431 | Interleaved data path and output management architecture for an interleaved memory and load pulser circuit for outputting the read data | Salvatore Nicosia, Francesco Tomaiuolo, Fabrizio Campanale, Promod Kumar | 2002-10-22 |
| 6452864 | Interleaved memory device for sequential access synchronous reading with simplified address counters | Carmelo Condemi, Fabrizio Campanale, Salvatore Nicosia, Francesco Tomaiuolo, Promod Kumar | 2002-09-17 |
| 6366634 | Accelerated carry generation | Salvatore Nicosia, Francesco Tomaiuolo, Fabrizio Campanale, Promod Kumar, Carmelo Condemi | 2002-04-02 |
| 6356505 | Internal regeneration of the address latch enable (ALE) signal of a protocol of management of a burst interleaved memory and related circuit | Salvatore Nicosia, Fabrizio Campanale, Francesco Tomaiuolo, Luigi Pascucci | 2002-03-12 |
| 6292405 | Data output buffer with precharge | Salvatore Nicosia, Giovanni Pagano, Gaetano Palumbo | 2001-09-18 |