PV

Paul Vyedin

RI Real Intent: 1 patents #10 of 16Top 65%
📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #2,713,335 of 4,157,543Top 70%
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Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10935595 Methods for identifying integrated circuit failures caused by asynchronous clock-domain crossings in the presence of multiple modes Vishnu Vimjam, Vikas Sachdeva, Prakash Narain 2021-03-02