Issued Patents All Time
Showing 25 most recent of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11904728 | Thermal management system for battery pack and thermal management system for electric vehicle | Xingyuan Wu, Guowei Li, Wei Zhang, Zhimin Dan, Xiyang Zuo | 2024-02-20 |
| 11886910 | Dynamic prioritization of system-on-chip interconnect traffic using information from an operating system and hardware | William Zand, Thomas Klingenbrunn, Ali Taha | 2024-01-30 |
| 11636231 | Methods and apparatus for in-memory device access control | Dexter Tamio Chun | 2023-04-25 |
| 11630723 | Protected data streaming between memories | Dexter Tamio Chun | 2023-04-18 |
| 11631450 | Partial refresh technique to save memory refresh power | Jungwon Suh, Michael Hawjing Lo, Dexter Tamio Chun | 2023-04-18 |
| 11498451 | Thermal management method for battery pack | Xingyuan Wu, Yurui Song | 2022-11-15 |
| 11407331 | Battery heating system | Xiyang Zuo, Zhimin Dan, Wei Zhang, Yizhen Hou, Guowei Li +1 more | 2022-08-09 |
| 11164618 | Partial refresh technique to save memory refresh power | Jungwon Suh, Michael Hawjing Lo, Dexter Tamio Chun | 2021-11-02 |
| 11144467 | Bypassing cache memory in a write transaction in a system with multi-level memory | Ali Taha, Chia-Hung S. Kuo | 2021-10-12 |
| 11126586 | Boot time determination of calibration parameters for a component coupled to a system-on-chip | Dhamim Packer Ali, Sreenivasulu Reddy Chalamcharla, Ruchi Parekh, Daison Davis Koola, Dhaval Kanubhai Patel +2 more | 2021-09-21 |
| 11024361 | Coincident memory bank access via cross connected shared bank resources | Dexter Tamio Chun, Jungwon Suh | 2021-06-01 |
| 10991877 | Multi-state memory and method for manufacturing the same | Meiyin Yang, Jun Luo, Sumei Wang, Jing Xu, Junfeng Li +3 more | 2021-04-27 |
| 10971771 | Battery heating system and control method thereof | Zhimin Dan, Xiyang Zuo, Wei Zhang, Yizhen Hou, Guowei Li +1 more | 2021-04-06 |
| 10956057 | Adaptive power management of dynamic random access memory | Dexter Tamio Chun | 2021-03-23 |
| 10878880 | Selective volatile memory refresh via memory-side data valid indication | Dexter Tamio Chun, Pratik Patel | 2020-12-29 |
| 10831658 | Read-with-invalidate modified data in a cache line in a cache memory | Chia-Hung S. Kuo, Ali Taha | 2020-11-10 |
| 10817224 | Preemptive decompression scheduling for a NAND storage device | Subrato Kumar De, Dexter Tamio Chun | 2020-10-27 |
| 10795830 | Write access control for double data rate write-x/datacopy0 commands | Dexter Tamio Chun | 2020-10-06 |
| 10783252 | System and method for booting within a heterogeneous memory environment | Azzedine Touzni, Dexter Tamio Chun | 2020-09-22 |
| 10780795 | Battery heating system and control method thereof | Xiyang Zuo, Zhimin Dan, Wei Zhang, Yizhen Hou, Guowei Li +1 more | 2020-09-22 |
| 10726904 | Partial refresh technique to save memory refresh power | Jungwon Suh, Michael Hawjing Lo, Dexter Tamio Chun | 2020-07-28 |
| 10642781 | Boot time determination of calibration parameters for a component coupled to a system-on-chip | Dhamim Packer Ali, Sreenivasulu Reddy Chalamcharla, Ruchi Parekh, Daison Davis Koola, Dhaval Kanubhai Patel +2 more | 2020-05-05 |
| 10599442 | Selectable boot CPU | Dhamim Packer Ali, Ashutosh Shrivastava, Azzedine Touzni, Mamta Desai | 2020-03-24 |
| 10591975 | Memory access management for low-power use cases of a system on chip via secure non-volatile random access memory | Azzedine Touzni, Dexter Tamio Chun | 2020-03-17 |
| 10579516 | Systems and methods for providing power-efficient file system operation to a non-volatile block memory | Dexter Tamio Chun, William Kimberly | 2020-03-03 |