Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9355207 | Performing static timing analysis in the presence of instance-based systematic variations | — | 2016-05-31 |
| 9348358 | Clock multiplication and distribution | Pradip Thachile, Nikola Nedovic | 2016-05-24 |
| 9280628 | System and method for clock network meta-synthesis | Subodh M. Reddy | 2016-03-08 |
| 9270289 | Monolithic signal generation for injection locking | Nikola Nedovic | 2016-02-23 |
| 9236853 | Digital duty cycle correction | — | 2016-01-12 |
| 8903698 | Generating behavioral models for analog circuits | — | 2014-12-02 |
| 8878713 | Crossbar switch calibration system for facilitating analog-to-digital conversion monotonicity | Pradip Thachile, Magnus Olov Wiklund | 2014-11-04 |
| 8861627 | Direct mm-wave m-ary quadrature amplitude modulation (QAM) modulator operating in saturated power mode | Sorin Petre Voinigescu, Alexander Tomkins, Magnus Olov Wiklund | 2014-10-14 |
| 8718217 | Clock and data recovery (CDR) using phase interpolation | H. Anders Kristensson, Nikola Nedovic, Nestor Tzartzanis | 2014-05-06 |
| 8659973 | Sequential-write, random-read memory | Scott McLeod | 2014-02-25 |
| 8618840 | Frequency synthesizer tuning | — | 2013-12-31 |
| 8591356 | Baseball strike zone detection radar | — | 2013-11-26 |
| 8527257 | Transition-based macro-models for analog simulation | Subodh M. Reddy | 2013-09-03 |
| 8432995 | Algorithmic matching of a deskew channel | Samir Parikh, Nikola Nedovic | 2013-04-30 |
| 8411782 | Parallel generation and matching of a deskew channel | Samir Parikh, Nestor Tzartzanis | 2013-04-02 |
| 8300753 | Triple loop clock and data recovery (CDR) | Nikola Nedovic, Nestor Tzartzanis | 2012-10-30 |
| 8300754 | Clock and data recovery with a data aligner | Nikola Nedovic, Nestor Tzartzanis, Hirotaka Tamura | 2012-10-30 |
| 8255196 | Constructing a replica-based clock tree | Subodh M. Reddy, Ranjeez Murgai | 2012-08-28 |
| 8138798 | Symmetric phase detector | Nikola Nedovic, H. Anders Kristensson | 2012-03-20 |
| 8090064 | Single loop frequency and phase detection | Hirotaka Tamura, Nikola Nedovic | 2012-01-03 |
| 8058914 | Generating multiple clock phases | H. Anders Kristensson, Nestor Tzartzanis, Nikola Nedovic | 2011-11-15 |
| 7890904 | Estimating jitter in a clock tree of a circuit and synthesizing a jitter-aware and skew-aware clock tree | Rajeev Murgai | 2011-02-15 |
| 7788613 | Border-enhanced sliding window scheme (SWS) for determining clock timing in a mesh-based clock architecture | Subodh M. Reddy, Rajeev Murgai | 2010-08-31 |
| 7725852 | Sliding window scheme (SWS) for determining clock timing in a mesh-based clock architecture | Hongyu Chen, Rajeev Murgai | 2010-05-25 |
| 7698151 | Electronic document presentment services in the event of a disaster | Francesco Gozzo, Emmett M. Perry, Jr., Michael J. Maselli, James N. Sutton, Jr. | 2010-04-13 |