Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430486 | Combined global and local process variation modeling | Li Ding | 2025-09-30 |
| 12112108 | Method to compute timing yield and yield bottleneck using correlated sample generation and efficient statistical simulation | Jiayong Le, Li Ding | 2024-10-08 |
| 11893332 | Global mistracking analysis in integrated circuit design | Li Ding | 2024-02-06 |
| 11210448 | Mitigating timing yield loss due to high-sigma rare-event process variation | Kelvin Le, Li Ding | 2021-12-28 |