Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176387 | Trench capacitor profile to decrease substrate warpage | Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su +4 more | 2024-12-24 |
| 11769792 | Trench capacitor profile to decrease substrate warpage | Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su +4 more | 2023-09-26 |
| 11063157 | Trench capacitor profile to decrease substrate warpage | Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su +4 more | 2021-07-13 |
| 9373627 | Multiple-time programming memory cells and methods for forming the same | Ching-Hung Fu, Chun-Yao Ko, Ting-Chen Hsu | 2016-06-21 |
| 8952442 | Multiple-time programming memory cells and methods for forming the same | Ching-Hung Fu, Chun-Yao Ko, Ting-Chen Hsu | 2015-02-10 |
| 8772854 | Multiple-time programming memory cells and methods for forming the same | Ching-Hung Fu, Chun-Yao Ko, Ting-Chen Hsu | 2014-07-08 |
| 7923787 | MOSFET with isolation structure and fabrication method thereof | Chih-Feng Huang, Jenn-yu G. Lin, Ta-Yung Yang | 2011-04-12 |
| 7858466 | Different-voltage device manufactured by a CMOS compatible process and high-voltage device used in the different-voltage device | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2010-12-28 |
| 7847365 | MOSFET with isolation structure for monolithic integration and fabrication method thereof | Chih-Feng Huang, Jenn-yu G. Lin, Ta-Yung Yang | 2010-12-07 |
| 7615826 | Electrostatic discharge protection semiconductor structure | Chih-Feng Huang, Jenn-yu G. Lin, Ta-Yung Yang | 2009-11-10 |
| 7417287 | Electrostatic discharge device having controllable trigger voltage | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2008-08-26 |
| 7355250 | Electrostatic discharge device with controllable holding current | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2008-04-08 |
| 7285837 | Electrostatic discharge device integrated with pad | Chih-Feng Huang, Jenn-yu G. Lin, Ta-Yung Yang | 2007-10-23 |
| 7205201 | CMOS compatible process with different-voltage devices | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2007-04-17 |
| 7169661 | Process of fabricating high resistance CMOS resistor | Chih-Feng Huang | 2007-01-30 |
| 7102194 | High voltage and low on-resistance LDMOS transistor having radiation structure and isolation effect | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2006-09-05 |
| 7042028 | Electrostatic discharge device | Chih-Feng Huang, Jenn-yu G. Lin, Ta-Yung Yang | 2006-05-09 |
| 6995428 | High voltage LDMOS transistor having an isolated structure | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2006-02-07 |
| 6903421 | Isolated high-voltage LDMOS transistor having a split well structure | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2005-06-07 |
| 6873011 | High voltage and low on-resistance LDMOS transistor having equalized capacitance | Chih-Feng Huang, Ta-Yung Yang, Jenn-yu G. Lin | 2005-03-29 |