TF

Theodore E. FONG

SG Silicon Genesis: 9 patents #10 of 40Top 25%
Overall (All Time): #543,260 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12176326 Method of forming semiconductor device using high stress cleave plane Michael I. Current 2024-12-24
11901351 Three dimensional integrated circuit with lateral connection layer Michael I. Current 2024-02-13
11626392 Method of forming semiconductor device using range compensating material Michael I. Current 2023-04-11
11410984 Three dimensional integrated circuit with lateral connection layer Michael I. Current 2022-08-09
10923459 Three dimensional integrated circuit Michael I. Current 2021-02-16
10804252 Three dimensional integrated circuit Michael I. Current 2020-10-13
10573627 Three dimensional integrated circuit Michael I. Current 2020-02-25
10049915 Three dimensional integrated circuit Michael I. Current 2018-08-14
9704835 Three dimensional integrated circuit Michael I. Current 2017-07-11