Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8539409 | Simultaneous development of complementary IC families | Shawn Murray, John Schadt, Luan Chau, Thomas R. Gustafson | 2013-09-17 |
| 7989911 | Shallow trench isolation (STI) with trench liner of increased thickness | Sunil Mehta, Stewart Logie | 2011-08-02 |
| 7985656 | Shallow trench isolation (STI) with trench liner of increased thickness | Sunil Mehta, Stewart Logie | 2011-07-26 |
| 6570212 | Complementary avalanche injection EEPROM cell | Sunil Mehta, Stewart Logie | 2003-05-27 |
| 6404006 | EEPROM cell with tunneling across entire separated channels | Xiao-Yu Li | 2002-06-11 |
| 6326663 | Avalanche injection EEPROM memory cell with P-type control gate | Xiao-Yu Li, Sunil Mehta | 2001-12-04 |
| 6294810 | EEPROM cell with tunneling at separate edge and channel regions | Xiao-Yu Li | 2001-09-25 |
| 6294811 | Two transistor EEPROM cell | Xiao-Yu Li | 2001-09-25 |
| 6215700 | PMOS avalanche programmed floating gate memory cell structure | Stewart Logie, Sunil Mehta | 2001-04-10 |
| 6064595 | Floating gate memory apparatus and method for selected programming thereof | Stewart Logie, Sunil Mehta | 2000-05-16 |
| 6028789 | Zero-power CMOS non-volatile memory cell having an avalanche injection element | Sunil Mehta, Brad Sharpe-Geisler | 2000-02-22 |