SH

Siu-Tong Hui

VT Vlsi Technology: 4 patents #137 of 594Top 25%
MS Monterey Design Systems: 1 patents #21 of 38Top 60%
VT Vsli Technology: 1 patents #5 of 38Top 15%
📍 San Jose, CA: #9,474 of 32,062 inventorsTop 30%
🗺 California: #93,399 of 386,348 inventorsTop 25%
Overall (All Time): #882,356 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
6446239 Method and apparatus for optimizing electronic design Ara Markosian, Yaacov (Jacob) Greidinger, Sedrak Sargisian 2002-09-03
5974245 Method and apparatus for making integrated circuits by inserting buffers into a netlist Ying Li, Sunil Ashtaputre, Jacob Greidinger, Mark R. Hartoog, Moazzem Hossain 1999-10-26
5638291 Method and apparatus for making integrated circuits by inserting buffers into a netlist to control clock skew Ying Li, Sunil Ashtaputre, Jacob Greidinger, Mark R. Hartoog, Moazzem Hossain 1997-06-10
5377125 Improved pad ring router Sunil Ashtaputre 1994-12-27
5359538 Method for regular placement of data path components in VLSI circuits Dale Wong 1994-10-25
5308798 Preplacement method for weighted net placement integrated circuit design layout tools Daniel Brasen 1994-05-03