Issued Patents All Time
Showing 51–75 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6549456 | Integrated circuit with analog or multilevel storage cells and user-selectable sampling frequency | Carl W. Werner, Andreas Haeberli, Leon Sea Jiunn Wong, Cheng-Yuan Wang, Hock C. So | 2003-04-15 |
| 6532556 | Data management for multi-bit-per-cell memories | Hock C. So | 2003-03-11 |
| 6522586 | Dynamic refresh that changes the physical storage locations of data in flash memory | — | 2003-02-18 |
| 6498851 | Data encryption and signal scrambling using programmable data conversion arrays | — | 2002-12-24 |
| 6480422 | Contactless flash memory with shared buried diffusion bit line architecture | — | 2002-11-12 |
| 6466476 | Data coding for multi-bit-per-cell memories having variable numbers of bits per memory cell | Kimberley Johnsen | 2002-10-15 |
| 6396744 | Flash memory with dynamic refresh | — | 2002-05-28 |
| 6370075 | Charge pump circuit adjustable in response to an external voltage source | Andreas Haeberli, Hock C. So, Carl W. Werner, Cheng-Yuan Wang, Leon Sea Jiunn Wong | 2002-04-09 |
| 6363008 | Multi-bit-cell non-volatile memory with maximized data capacity | — | 2002-03-26 |
| 6345000 | Flash memory permitting simultaneous read/write and erase operations in a single memory array | Hock C. So, Cheng-Yuan Wang, Roger Y. Lo | 2002-02-05 |
| 6330185 | High bandwidth multi-level flash memory using dummy memory accesses to improve precision when writing or reading a data stream | Hock C. So | 2001-12-11 |
| 6317349 | Non-volatile content addressable memory | — | 2001-11-13 |
| 6314025 | High data rate write process for non-volatile flash memories | — | 2001-11-06 |
| 6307776 | Multi-bit-per-cell flash EEPROM memory with refresh | Hock C. So | 2001-10-23 |
| 6285593 | Word-line decoder for multi-bit-per-cell and analog/multi-level memories with improved resolution and signal-to-noise ratio | — | 2001-09-04 |
| 6278633 | High bandwidth flash memory that selects programming parameters according to measurements of previous programming operations | Hock C. So | 2001-08-21 |
| 6259627 | Read and write operations using constant row line voltage and variable column line load | — | 2001-07-10 |
| 6208542 | Techniques for storing digital data in an analog or multilevel memory | Cheng-Yuan Wang, Andreas Haeberli, Carl W. Werner, Hock C. So, Leon Sea Jiunn Wong | 2001-03-27 |
| 6184726 | Adjustable level shifter circuits for analog or multilevel memories | Andreas Haeberli, Carl W. Werner, Cheng-Yuan Wang, Hock C. So, Leon Sea Jiunn Wong | 2001-02-06 |
| 6185119 | Analog memory IC with fully differential signal path | Andreas Haeberli, Carl W. Werner, Hock C. So, Cheng-Yuan Wang, Leon Sea Jiunn Wong | 2001-02-06 |
| 6169503 | Programmable arrays for data conversions between analog and digital | — | 2001-01-02 |
| 6166938 | Data encoding for content addressable memories | — | 2000-12-26 |
| 6160739 | Non-volatile memories with improved endurance and extended lifetime | — | 2000-12-12 |
| 6157558 | Content addressable memory cell and array architectures having low transistor counts | — | 2000-12-05 |
| 6154157 | Non-linear mapping of threshold voltages for analog/multi-level memory | — | 2000-11-28 |