| 7143374 |
System and method for achieving analysis capacity for circuit analysis tools |
Gregory Dennis Rogers, George Harold Robbert |
2006-11-28 |
| 7134107 |
System and method for determining detail of analysis in a circuit design |
Gregory Dennis Rogers, George Harold Robbert |
2006-11-07 |
| 7124393 |
System and method for processing configuration information |
Gregory Dennis Rogers, George Harold Robbert |
2006-10-17 |
| 7124380 |
System and method for controlling analysis of multiple instantiations of circuits in hierarchical VLSI circuit designs |
Gregory Dennis Rogers, George Harold Robbert |
2006-10-17 |
| 7086019 |
Systems and methods for determining activity factors of a circuit design |
Gregory Dennis Rogers, George Harold Robbert |
2006-08-01 |
| 7076752 |
System and method for determining unmatched design elements in a computer-automated design |
Gregory Dennis Rogers, George Harold Robbert |
2006-07-11 |
| 7073152 |
System and method for determining a highest level signal name in a hierarchical VLSI design |
Gregory Dennis Rogers, George Harold Robbert |
2006-07-04 |
| 7062727 |
Computer aided design systems and methods with reduced memory utilization |
Gregory Dennis Rogers, George Harold Robbert |
2006-06-13 |
| 7058908 |
Systems and methods utilizing fast analysis information during detailed analysis of a circuit design |
Gregory Dennis Rogers, George Harold Robbert |
2006-06-06 |
| 7047507 |
System and method for determining wire capacitance for a VLSI circuit |
Gregory Dennis Rogers, George Harold Robbert |
2006-05-16 |
| 7032206 |
System and method for iteratively traversing a hierarchical circuit design |
Gregory Dennis Rogers, George Harold Robbert |
2006-04-18 |
| 6957367 |
System and method for controlling activity of temporary files in a computer system |
Gregory Dennis Rogers, George Harold Robbert |
2005-10-18 |
| 6637012 |
Method and system for identifying FETs implemented in a predefined logic equation |
Gregory Dennis Rogers |
2003-10-21 |
| 6550040 |
Method and system for identifying dynamic NAND or NOR gates from a netlist |
Gregory Dennis Rogers |
2003-04-15 |