Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10664481 | Computer system programmed to identify common subsequences in logs | Alberto Prieto | 2020-05-26 |
| 10621063 | System and method for dynamic domain-specific sequence diagram visualization | — | 2020-04-14 |
| 9690630 | Hardware accelerator test harness generation | Navendu Sinha, William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande +2 more | 2017-06-27 |
| 9460034 | Structured block transfer module, system architecture, and method for transferring | William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2016-10-04 |
| 9430427 | Structured block transfer module, system architecture, and method for transferring | William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2016-08-30 |
| 9003166 | Generating hardware accelerators and processor offloads | Navendu Sinha, William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande +2 more | 2015-04-07 |
| 8706987 | Structured block transfer module, system architecture, and method for transferring | William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2014-04-22 |
| 8671163 | Multi-output packet server with independent streams | Michael G. Luby, Ronen Vainish, Lars Eilstrup Rasmussen, David Kushi, Serban Simu +4 more | 2014-03-11 |
| 8289966 | Packet ingress/egress block and system and method for receiving, transmitting, and managing packetized data | Stephen John Joseph Fricke, William Charles Jordan, Bryon Irwin Moyer, Akash R. Deshpande, Navendu Sinha +2 more | 2012-10-16 |
| 8185809 | Multi-output packet server with independent streams | Michael G. Luby, Ronen Vainish, Lars Eilstrup Rasmussen, David Kushi, Serban Simu +4 more | 2012-05-22 |
| 8127113 | Generating hardware accelerators and processor offloads | Navendu Sinha, William Charles Jordan, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande +2 more | 2012-02-28 |
| 7320044 | System, method, and computer program product for interrupt scheduling in processing communication | Marco Zandonadi, Akash R. Deshpande | 2008-01-15 |
| 7039772 | System, method, and computer program product for processing reflective state machines | Marco Zandonadi, Akash R. Deshpande | 2006-05-02 |
| 6985976 | System, method, and computer program product for memory management for defining class lists and node lists for allocation and deallocation of memory blocks | Marco Zandonadi, Akash R. Deshpande | 2006-01-10 |