Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9690630 | Hardware accelerator test harness generation | Navendu Sinha, Bryon Irwin Moyer, Stephen John Joseph Fricke, Roberto Attias, Akash R. Deshpande +2 more | 2017-06-27 |
| 9460034 | Structured block transfer module, system architecture, and method for transferring | Roberto Attias, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2016-10-04 |
| 9430427 | Structured block transfer module, system architecture, and method for transferring | Roberto Attias, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2016-08-30 |
| 9003166 | Generating hardware accelerators and processor offloads | Navendu Sinha, Bryon Irwin Moyer, Stephen John Joseph Fricke, Roberto Attias, Akash R. Deshpande +2 more | 2015-04-07 |
| 8706987 | Structured block transfer module, system architecture, and method for transferring | Roberto Attias, Bryon Irwin Moyer, Stephen John Joseph Fricke, Akash R. Deshpande, Navendu Sinha +2 more | 2014-04-22 |
| 8289966 | Packet ingress/egress block and system and method for receiving, transmitting, and managing packetized data | Stephen John Joseph Fricke, Bryon Irwin Moyer, Roberto Attias, Akash R. Deshpande, Navendu Sinha +2 more | 2012-10-16 |
| 8127113 | Generating hardware accelerators and processor offloads | Navendu Sinha, Bryon Irwin Moyer, Stephen John Joseph Fricke, Roberto Attias, Akash R. Deshpande +2 more | 2012-02-28 |