Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12086521 | Circuit design simulation and clock event reduction | Tharun Kumar Ksheerasagar, Rohit Bhadana, Hemant Kashyap | 2024-09-10 |
| 9723312 | Method and system for random accessible image compression with adaptive quantization | — | 2017-08-01 |