Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7969806 | Systems and methods for writing to a memory | Luca De Ambroggi, Jens Egerer | 2011-06-28 |
| 7876598 | Apparatus and method for determining a memory state of a resistive n-level memory cell and memory device | Stefan Dietrich | 2011-01-25 |
| 7706201 | Integrated circuit with Resistivity changing memory cells and methods of operating the same | Corvin Liaw, Michael Angerbauer | 2010-04-27 |
| 7583546 | Apparatus and method of operating an integrated circuit | Stefan Dietrich | 2009-09-01 |
| 7404018 | Read latency control circuit | Stefan Dietrich, Thomas Hein, Patrick Heyne | 2008-07-22 |
| 7224625 | Method and circuit arrangement for controlling write access to a semiconductor memory | Stefan Dietrich, Thomas Hein, Christian Weis | 2007-05-29 |
| 7215263 | Parallel-serial converter | Stefan Dietrich, Thomas Hein | 2007-05-08 |
| 7012843 | Device for driving a memory cell of a memory module by means of a charge store | Thilo Marx, Manfred Dobler | 2006-03-14 |
| 6948014 | Register for the parallel-serial conversion of data | Stefan Dietrich | 2005-09-20 |
| 6819624 | Latency time circuit for an S-DRAM | Pramod Acharya, Stefan Dietrich, Sabine Kieser | 2004-11-16 |
| 6731567 | DDR memory and storage method | Pramod Acharya, Stefan Dietrich, Sabine Kieser | 2004-05-04 |
| 6717886 | Control circuit for an S-DRAM | Acharya Pramod, Stefan Dietrich, Sabine Kieser, Christian Weis | 2004-04-06 |
| 6670802 | Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits | Stefan Dietrich, Patrick Heyne, Thilo Marx, Sabine Kieser, Michael Sommer +4 more | 2003-12-30 |
| 6532188 | Integrated memory having a row access controller for activating and deactivating row lines | Stefan Dietrich, Thomas Hein, Patrick Heyne, Thilo Marx, Torsten Partsch +3 more | 2003-03-11 |