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Systems and methods for real-time frequency shift detection via a nested-MEMS architecture |
Duane Younkin, Ronald J. Lipka, Ryan Hennessy, Diego EMILIO SERRANO, Chihchuan Che +1 more |
2025-03-04 |
| 8750338 |
Symmetrical clock distribution in multi-stage high speed data conversion circuits |
Guangming Yin, Bo Zhang, Jun Cao |
2014-06-10 |
| 8259762 |
Symmetrical clock distribution in multi-stage high speed data conversion circuits |
Guangming Yin, Bo Zhang, Jun Cao |
2012-09-04 |
| 7778288 |
Symmetrical clock distribution in multi-stage high speed data conversion circuits |
Guangming Yin, Bo Zhang, Jun Cao |
2010-08-17 |
| 7630410 |
Signal line selection and polarity change of natural bit ordering in high-speed serial bit stream multiplexing and demultiplexing integrated circuits |
Daniel Schoch |
2009-12-08 |
| 7577171 |
Source centered clock supporting quad 10 GBPS serial interface |
Guangming Yin, Ali Ghiasi |
2009-08-18 |
| 7443890 |
Multi-stage multiplexing chip set having switchable forward/reverse clock relationship |
Ali Ghiasi |
2008-10-28 |
| 7349450 |
Multi-stage high speed bit stream demultiplexer chip set having switchable master/slave relationship |
Ali Ghiasi, Rajagopal Anantha Rao |
2008-03-25 |
| 7346082 |
High-speed serial bit stream multiplexing and demultiplexing integrated circuits |
Ali Ghiasi, Guangming Yin |
2008-03-18 |
| 7319706 |
Symmetrical clock distribution in multi-stage high speed data conversion circuits |
Guangming Yin, Bo Zhang, Jun Cao |
2008-01-15 |
| 7098692 |
Switchable power domains for 1.2v and 3.3v pad voltages |
Sridevi R. Joshi, Guangming Yin, Daniel Schoch |
2006-08-29 |
| 6943587 |
Switchable power domains for 1.2V and 3.3V pad voltages |
Sridevi R. Joshi, Guangming Yin, Daniel Schoch |
2005-09-13 |