KK

Kenneth Michael Key

CI Cisco: 18 patents #679 of 13,007Top 6%
Overall (All Time): #258,515 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8180966 System and method for operating a packet buffer in an intermediate node Kwok Ken Mak, Xiaoming Sun 2012-05-15
7895412 Programmable arrayed processing engine architecture for a network switch Darren Kerr, Michael L. Wright, William E. Jennings 2011-02-22
7380101 Architecture for a processor complex of an arrayed pipelined processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2008-05-27
7185224 Processor isolation technique for integrated multi-processor systems William Fredenburg, Michael L. Wright, John Marshall 2007-02-27
6892285 System and method for operating a packet buffer Kwok Ken Mak, Xiaoming Sun 2005-05-10
6876961 Electronic system modeling using actual and approximated system properties John Marshall, Scott Nellenbach 2005-04-05
6851028 System and method for processing memory requests Kwok Ken Mak, Xiaoming Sun, L. Duane Richardson 2005-02-01
6836838 Architecture for a processor complex of an arrayed pipelined processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2004-12-28
6681341 Processor isolation method for integrated multi-processor systems William Fredenburg, Michael L. Wright, John Marshall 2004-01-20
6513108 Programmable processing engine for efficiently processing transient data Darren Kerr, Michael L. Wright, William E. Jennings 2003-01-28
6442669 Architecture for a process complex of an arrayed pipelined processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2002-08-27
6385747 Testing of replicated components of electronic device Jeffery B. Scott, Michael L. Wright, Scott Nellenbach 2002-05-07
6356548 Pooled receive and transmit queues to access a shared bus in a multi-port switch asic Scott Nellenbach, Edward Paradise, Kenneth H. Potter, Jr. 2002-03-12
6272621 Synchronization and control system for an arrayed processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2001-08-07
6195739 Method and apparatus for passing data among processor complex stages of a pipelined processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2001-02-27
6173386 Parallel processor with debug capability Michael L. Wright, Darren Kerr, William E. Jennings, Scott Nellenbach 2001-01-09
6119215 Synchronization and control system for an arrayed processing engine Michael L. Wright, Darren Kerr, William E. Jennings 2000-09-12
6101599 System for context switching between processing elements in a pipeline of processing elements Michael L. Wright, Darren Kerr, William E. Jennings 2000-08-08