Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12094520 | Memory device layout with intersecting region between sub-wordline and sense amplifier | Harish V. Gadamsetty | 2024-09-17 |
| 8958256 | Apparatuses and methods for improved memory operation times | Vijayakrishna J. Vankayala, Gary L. Howe, Vipul Surlekar | 2015-02-17 |