Issued Patents All Time
Showing 25 most recent of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7510961 | Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure | — | 2009-03-31 |
| 6984874 | Semiconductor device with metal fill by treatment of mobility layers including forming a refractory metal nitride using TMEDT | Russell C. Zahorik, Brenda D. Kraus | 2006-01-10 |
| 6812139 | Method for metal fill by treatment of mobility layers | Russell C. Zahorik, Brenda D. Kraus | 2004-11-02 |
| 6790764 | Processing methods for providing metal-comprising materials within high aspect ratio openings | — | 2004-09-14 |
| 6787447 | Semiconductor processing methods of forming integrated circuitry | — | 2004-09-07 |
| 6787472 | Utilization of disappearing silicon hard mask for fabrication of semiconductor structures | Mark E. Jost | 2004-09-07 |
| 6784550 | Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication | Paul A. Farrar | 2004-08-31 |
| 6781235 | Three-level unitary interconnect structure | — | 2004-08-24 |
| 6774035 | Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication | Paul A. Farrar | 2004-08-10 |
| 6689693 | Methods for utilization of disappearing silicon hard mask for fabrication of semiconductor structures | Mark E. Jost | 2004-02-10 |
| 6548883 | Reduced RC between adjacent substrate wiring lines | — | 2003-04-15 |
| 6537903 | Processing methods for providing metal-comprising materials within high aspect ratio openings | — | 2003-03-25 |
| 6534408 | Utilization of disappearing silicon hard mask for fabrication of semiconductor structures | Mark E. Jost | 2003-03-18 |
| 6482735 | Method for improved metal fill by treatment of mobility layers | Russell C. Zahorik, Brenda D. Kraus | 2002-11-19 |
| 6461963 | Utilization of disappearing silicon hard mask for fabrication of semiconductor structures | Mark E. Jost | 2002-10-08 |
| 6404053 | Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure | — | 2002-06-11 |
| 6396119 | Reduced RC delay between adjacent substrate wiring lines | — | 2002-05-28 |
| 6320261 | High aspect ratio metallization structures for shallow junction devices, and methods of forming the same | Randle D. Burton | 2001-11-20 |
| 6319813 | Semiconductor processing methods of forming integrated circuitry and integrated circuitry constructions | — | 2001-11-20 |
| 6316360 | High aspect ratio metallization structures for shallow junction devices, and methods of forming the same | Randle D. Burton | 2001-11-13 |
| 6316356 | Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication | Paul A. Farrar | 2001-11-13 |
| 6309946 | Reduced RC delay between adjacent substrate wiring lines | — | 2001-10-30 |
| 6297156 | Method for enhanced filling of high aspect ratio dual damascene structures | Paul A. Farrar | 2001-10-02 |
| 6274253 | Processing methods for providing metal-comprising materials within high aspect ratio openings | — | 2001-08-14 |
| 6271593 | Method for fabricating conductive components in microelectronic devices and substrate structures therefor | Richard H. Lane | 2001-08-07 |