Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11082327 | System and method for computational transport network-on-chip (NoC) | — | 2021-08-03 |
| 10990394 | Systems and methods for mixed instruction multiple data (xIMD) computing | — | 2021-04-27 |
| 10489193 | Live migration of hardware accelerated applications | Shiva Rao | 2019-11-26 |
| 10169065 | Live migration of hardware accelerated applications | Shiva Rao | 2019-01-01 |
| 9552206 | Integrated circuit with control node circuitry and processing circuitry | William M. Johnson, Murali Chinnakonda, Toshio Nagata, John W. Glotzbach, Hamid R. Sheikh +6 more | 2017-01-24 |
| 7752426 | Processes, circuits, devices, and systems for branch prediction and other processor improvements | Thang M. Tran | 2010-07-06 |
| 7587532 | Full/selector output from one of plural flag generation count outputs | Sam B. Sandbote | 2009-09-08 |
| 7266648 | Cache lock mechanism with speculative allocation | Edwin R. Sutanto, Hoichi Cheong, Zhongru Julia Lin | 2007-09-04 |
| 6986010 | Cache lock mechanism with speculative allocation | Edwin R. Sutanto, Hoichi Cheong, Zhongru Julia Lin | 2006-01-10 |
| 6189077 | Two computer access circuit using address translation into common register file | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 2001-02-13 |
| 6154824 | Multifunctional access devices, systems and methods | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 2000-11-28 |
| 5940610 | Using prioritized interrupt callback routines to process different types of multimedia information | David Cureton Baker, Michael D. Asal, Jonathan I. Siann, Paul B. Wood, Stephen Glennon +1 more | 1999-08-17 |
| 5696923 | Graphics processor writing to shadow register at predetermined address simultaneously with writing to control register | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 1997-12-09 |
| 5696924 | Memory access circuit with address translation performing auto increment of translated address on writes and return to translated address on reads | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 1997-12-09 |
| H1690 | Process for bleaching kraft pulp | — | 1997-11-04 |
| 5636335 | Graphics computer system having a second palette shadowing data in a first palette | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 1997-06-03 |
| 5607547 | Method for reduced sulfur dioxide formation in refiner bleaching | Martin G. Fairbank | 1997-03-04 |
| 5546553 | Multifunctional access devices, systems and methods | Iain Robertson, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton | 1996-08-13 |
| 5386538 | Data cache access for signal processing systems | — | 1995-01-31 |
| 5371517 | Video interface palette, systems and method | Louis J. Izzi, William R. Krenik, Henry Tin-Hang Yung, Chenwei J. Yin, Carrell R. Killebrew, Jr. +4 more | 1994-12-06 |
| 5341470 | Computer graphics systems, palette devices and methods for shift clock pulse insertion during blanking | Richard Simpson, Michael D. Asal | 1994-08-23 |
| 5327159 | Packed bus selection of multiple pixel depths in palette devices, systems and methods | Jerry R. Van Aken, Carrell R. Killebrew, Jr., Karl M. Guttag | 1994-07-05 |
| 5309551 | Devices, systems and methods for palette pass-through mode | Karl M. Guttag, Michael D. Asal | 1994-05-03 |
| 5293468 | Controlled delay devices, systems and methods | Karl M. Guttag | 1994-03-08 |
| 5287100 | Graphics systems, palettes and methods with combined video and shift clock control | Karl M. Guttag, Jerry R. Van Aken, Carrell R. Killebrew, Jr., Michael D. Asal | 1994-02-15 |