JY

Jae-Yoon Yoo

Samsung: 14 patents #9,740 of 75,807Top 15%
SH Sk Hynix: 5 patents #1,392 of 4,849Top 30%
Overall (All Time): #231,325 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
12401917 Image processing device and image correcting method Jeong Yong SONG, Dong Gyun Kim, Bo-Ra Lee 2025-08-26
12008789 Image sensing device and method of operating the same Jeong Yong SONG, Ji Hee HAN 2024-06-11
11736812 Image sensing device for correcting image using block areas and method of operating the same Ji Hee HAN, Jeong Yong SONG 2023-08-22
11451752 Grid gain calculation circuit, image sensing device and operation method of the same 2022-09-20
11159722 Method for processing image signal, image signal processor, and image sensor chip Jae Ho An, Su Min Kim, Jin Su Kim, Tae Hyun Kim, Chang-Hee Pyeoun 2021-10-26
7723193 Method of forming an at least penta-sided-channel type of FinFET transistor Hwa-Sung Rhee, Hyun Suk Kim, Ueno Tetsuji, Seung Hwan Lee, Ho-Jin Lee +1 more 2010-05-25
7618868 Method of manufacturing field effect transistors using sacrificial blocking layers Young-Gun Ko 2009-11-17
7439596 Transistors for semiconductor device and methods of fabricating the same Hwa-Sung Rhee, Tetsuji Ueno, Ho Sang Lee, Seung Hwan Lee, Hyun Suk Kim +1 more 2008-10-21
7385247 At least penta-sided-channel type of FinFET transistor Hwa-Sung Rhee, Hyun Suk Kim, Ueno Tetsuji, Seung Hwan Lee, Ho-Jin Lee +1 more 2008-06-10
7368792 MOS transistor with elevated source/drain structure Seung Hwan Lee, Moon-han Park, Hwa-Sung Rhee, Ho-Jin Lee 2008-05-06
7101776 Method of fabricating MOS transistor using total gate silicidation process Hwa-Sung Rhee, Ho-Cheol Lee, Seung Hwan Lee 2006-09-05
7084041 Bipolar device and method of manufacturing the same including pre-treatment using germane gas Hwa-Sung Rhee, Ho-Cheol Lee, Seung Hwan Lee, Byou-Ree Lim 2006-08-01
7033895 Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process Seung Hwan Lee, Moon-han Park, Hwa-Sung Rhee, Ho-Jin Lee 2006-04-25
6987310 Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device Ho Sang Lee, Moon-han Park, Hwa-Sung Rhee, Seung Hwan Lee 2006-01-17
6878575 Method of forming gate oxide layer in semiconductor devices Moon-han Park, Byou-Ree Lim 2005-04-12
6835621 Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon Moon-han Park, Dae-Jin Kwon 2004-12-28
6624496 Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer Ja-Hum Ku, Dong-Ho Ahn, Chul-Sung Kim, Sug-hun Hong, Chul-Joon Choi 2003-09-23
6486039 Method of fabricating a trench isolation structure having sidewall oxide layers with different thicknesses Jeong S. Lee, Nae-In Lee 2002-11-26
6383877 Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer Dong-Ho Ahn, Ja-Hum Ku, Chul-Sung Kim, Sug-hun Hong, Chul-Joon Choi 2002-05-07