Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7103764 | Parallel port with direct memory access capabilities | — | 2006-09-05 |
| 6851038 | Background fetching of translation lookaside buffer (TLB) entries | Duane F. Krolski | 2005-02-01 |
| 6772238 | Parallel port with direct memory access capabilities | — | 2004-08-03 |
| 6751695 | Bus bridge device for advanced microcontroller bus architecture (AMBA) advanced system bus (ASB) protocol | — | 2004-06-15 |
| 6578098 | Predictive mechanism for ASB slave responses | Subramanian S. Meiyappan | 2003-06-10 |
| 6574691 | Apparatus and method for interfacing a non-sequential 486 interface burst interface to a sequential ASB interface | David R. Evoy | 2003-06-03 |
| 6408346 | System for communicating with an external device using a parallel port with DMA capabilities and for developing a signal to indicate the availability of data | — | 2002-06-18 |
| 6378044 | Method and system for cache replacement among configurable cache sets | Roger W. Luce | 2002-04-23 |
| 6138184 | System for parallel port with direct memory access controller for developing signal to indicate packet available and receiving signal that packet has been accepted | — | 2000-10-24 |
| 5968144 | System for supporting DMA I/O device using PCI bus and PCI-PCI bridge comprising programmable DMA controller for request arbitration and storing data transfer information | Gary Walker, Rishi Nalubola, Franklyn H. Story | 1999-10-19 |
| 5892976 | System for parallel port with direct memory access controller for developing signal to indicate packet available and receiving signal that packet has been accepted | — | 1999-04-06 |
| 5793990 | Multiplex address/data bus with multiplex system controller and method therefor | David R. Evoy, Walter H. Potts | 1998-08-11 |
| 5768571 | System and method for altering the clock frequency to a logic controller controlling a logic device running at a fixed frequency slower than a computer system running the logic device | Gary Walker | 1998-06-16 |
| 5752081 | Signalling system and method for allowing a direct memory access (DMA) input/output (I/O) device on the peripheral component interconnect (PCI) bus to perform DMA transfers | — | 1998-05-12 |
| 5715467 | Event driven power management control circuit and method therefor | — | 1998-02-03 |
| 5539917 | Computer system having circuitry interfacing a DMA controller directly with a parallel port having specific timing control to allow printing operation without microprocessor intervention | — | 1996-07-23 |