Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11979232 | Verification of Ethernet hardware based on checksum correction with cyclic redundancy check | Jishnu De | 2024-05-07 |
| 11809363 | Debug methodology for a USB sub-system using unique identifier (UID) approach | Jishnu De | 2023-11-07 |
| 11705986 | Hardware based cyclic redundancy check (CRC) re-calculator for timestamped frames over a data bus | Jishnu De, Jitendra PURI | 2023-07-18 |
| 8248945 | System and method for Ethernet per priority pause packet flow control buffering | Satish Sathe, Satish Singh, Sundeep Gupta | 2012-08-21 |