HH

Hsi-Mao Hsiao

UM United Microelectronics: 10 patents #574 of 4,560Top 15%
UI United Silicon Incorporated: 4 patents #4 of 57Top 8%
ET Episil Technologies: 1 patents #10 of 24Top 45%
Overall (All Time): #471,533 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6815337 Method to improve borderless metal line process window for sub-micron designs 2004-11-09
6329291 Method of forming a lower storage node of a capacitor for dynamic random access memory Chuan-Fu Wang 2001-12-11
6291354 Method of fabricating a semiconductive device Chun-Lung Chen, H. C. Yu, Hsi-Chin Lin 2001-09-18
6291279 Method for forming different types of MOS transistors on a semiconductor wafer Chun-Lung Chen, Chia-Fu Yeh, Jung-Huang Chen 2001-09-18
6281133 Method for forming an inter-layer dielectric layer Wen-Shan Wei, Ming-Sheng Kuo, H. C. Yu 2001-08-28
6245626 Method of fabricating a MOS device using a sacrificial layer and spacer Chun-Lung Chen, Hsi-Chin Lin, Wen-Hua Cheng 2001-06-12
6200886 Fabricating process for polysilicon gate Hong Yu, Hsi-Chin Lin, Chun-Lung Chen 2001-03-13
6194279 Fabrication method for gate spacer Chun-Lung Chen, Hsi-Chin Lin, Wen-Hua Cheng 2001-02-27
6191029 Damascene process Chun-Lung Chen, Shin-Fa Lin 2001-02-20
6146971 Process for forming a shallow trench isolation structure Chun-Lung Chen, Hung-Chen Yu, Tzung-Han Lee 2000-11-14
6133091 Method of fabricating a lower electrode of capacitor Tong-Hsin Lee, Wen-Shan Wei, Chun-Lung Chen 2000-10-17