Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6248651 | Low cost method of fabricating transient voltage suppressor semiconductor devices or the like | Jack Eng, Joseph Chan, John Amato, Dennis Garbis | 2001-06-19 |
| 5882986 | Semiconductor chips having a mesa structure provided by sawing | Jack Eng, Joseph Chan, Willem G. Einthoven, John Amato, Sandy Tan +2 more | 1999-03-16 |
| 5640043 | High voltage silicon diode with optimum placement of silicon-germanium layers | Jack Eng, Joseph Chan, Lawrence LaTerza, Jun Wu, John Amato +2 more | 1997-06-17 |
| 5635414 | Low cost method of fabricating shallow junction, Schottky semiconductor devices | Dennis Garbis, Willem G. Einthoven, Joseph Chan, Jack Eng, Jun Wu +1 more | 1997-06-03 |
| 5432121 | Method for fabricating a multilayer epitaxial structure | Joseph Chan, Dennis Garbis, Lawrence LaTerza | 1995-07-11 |
| 5360509 | Low cost method of fabricating epitaxial semiconductor devices | Dennis Garbis, Joseph Chan, John Latza, Lawrence LaTerza | 1994-11-01 |
| 5324685 | Method for fabricating a multilayer epitaxial structure | Reinhold Hirtz, Joseph Chan, Dennis Garbis, Lawrence LaTerza, Ali Salih | 1994-06-28 |