ES

Etsuji Suzuki

YC Yamaichi Electronics Co.: 7 patents #25 of 159Top 20%
TO Toshiba: 5 patents #173 of 2,688Top 7%
TE Tokyo Shibaura Electric: 2 patents #32 of 337Top 10%
SC Soshotech Co.: 1 patents #5 of 9Top 60%
Overall (All Time): #327,820 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
6398561 Contact structure of lead Toshio Okuno 2002-06-04
6392530 Resistor array board 2002-05-21
6351885 Method of making conductive bump on wiring board Akira Yonezawa, Toshio Okuno 2002-03-05
6243946 Method of forming an interlayer connection structure Akira Yonezawa, Hidehisa Yamazaki 2001-06-12
5973395 IC package having a single wiring sheet with a lead pattern disposed thereon Akira Yonezawa, Hidehisa Yamazaki, Hiroshi Odaira 1999-10-26
5955780 Contact converting structure of semiconductor chip and process for manufacturing semiconductor chip having said contact converting structure Hiroshi Odaira, Eiji IMAMURA 1999-09-21
5950306 Circuit board Akira Yonezawa, Hidehisa Yamazaki 1999-09-14
4644584 Pattern position detecting apparatus Sumio Nagashima, Kiyomu Chiyoda, Masahiro Kodama 1987-02-17
4601577 Method and apparatus for detecting defects in a pattern Yukihiro Gotou 1986-07-22
4593309 Method of convergence measurement for a color picture tube and an apparatus therefor Shinichi Uno, Ryuhachirou Douji, Mituji Inoue 1986-06-03
4549206 Method and apparatus for examining printed circuit board provided with miniaturized electronic parts Shinichi Uno, Kiyomu Chiyoda, Ryuhachirou Douji 1985-10-22
4516673 Apparatus for conveying a lead frame mounting semiconductor pellets Tomio Kashihara, Toshiro Tsuruta, Masayoshi Yamaguchi, Kiyotachi Yokoi 1985-05-14
4473842 Apparatus and method for examining printed circuit board provided with electronic parts Shinichi Uno, Kiyomu Chiyoda, Mitsugi Nakanoya 1984-09-25
4203064 Method for automatically controlling the position of small objects Tomio Kashihara, Susumu Hashimoto, Ken Watanabe, Tsuyoshi Kodama 1980-05-13
4200393 Method of positioning a semiconductor member by examining it and a die bonding apparatus using the same Itaru Yasue, Tomio Kashihama 1980-04-29