Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5345576 | Microprocessor simultaneously issues an access to an external cache over an external cache bus and to an internal cache, cancels the external cache access on an internal cache hit, and reissues the access over a main memory bus on an external cache miss | Phillip G. Lee, Gurbir Singh, Randy Steck | 1994-09-06 |
| 5276690 | Apparatus utilizing dual compare logic for self checking of functional redundancy check (FRC) logic | Phil Gi Lee | 1994-01-04 |
| 5050066 | Apparatus with a single memory and a plurality of queue counters for queuing requests and replies on a pipelined packet bus | Mark S. Myers | 1991-09-17 |
| 4903270 | Apparatus for self checking of functional redundancy check (FRC) logic | David B. Johnson, Mark S. Myers | 1990-02-20 |