Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11928330 | Techniques to update a trim parameter in non-volatile memory | Shekoufeh Qawami | 2024-03-12 |
| 11194472 | Techniques to update a trim parameter in nonvolatile memory | Shekoufeh Qawami | 2021-12-07 |
| 10936418 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Shekoufeh Qawami, Julie M. Walker | 2021-03-02 |
| 10678315 | Thermal monitoring of memory resources | Rajesh Sundaram, Muthukumar P. Swaminathan | 2020-06-09 |
| 10649656 | Techniques to update a trim parameter in non-volatile memory | Shekoufeh Qawami | 2020-05-12 |
| 10324793 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Shekoufeh Qawami, Julie M. Walker | 2019-06-18 |
| 10325652 | Cell programming verification | Daniel Chu, Raymond W. Zeng | 2019-06-18 |
| 10289597 | Devices, systems, and methods of reducing chip select | Paul D. Ruby, Anand S. Ramalingam, Rajesh Sundaram, Julie M. Walker | 2019-05-14 |
| 10088880 | Thermal monitoring of memory resources | Rajesh Sundaram, Muthukumar P. Swaminathan | 2018-10-02 |
| 10062444 | Devices, system, and methods for implementing alternate control settings | Julie M. Walker | 2018-08-28 |
| 10056139 | Managing threshold voltage shift in nonvolatile memory | Shekoufeh Qawami, Rajesh Sundaram, Prashant S. Damle, Julie M. Walker | 2018-08-21 |
| 9996496 | Devices, systems, and methods of reducing chip select | Paul D. Ruby, Anand S. Ramalingam, Rajesh Sundaram, Julie M. Walker | 2018-06-12 |
| 9934088 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Shekoufeh Qawami, Julie M. Walker | 2018-04-03 |
| 9785603 | Devices, systems, and methods of reducing chip select | Paul D. Ruby, Anand S. Ramalingam, Rajesh Sundaram, Julie M. Walker | 2017-10-10 |
| 9747978 | Reference architecture in a cross-point memory | Balaji Srinivasan, Derchang Kau, Matthew Goldman | 2017-08-29 |
| 9747977 | Methods and systems for verifying cell programming in phase change memory | Daniel Chu, Raymond W. Zeng | 2017-08-29 |
| 9721657 | Managing threshold voltage shift in nonvolatile memory | Shekoufeh Qawami, Rajesh Sundaram, Prashant S. Damle, Julie M. Walker | 2017-08-01 |
| 9477616 | Devices, systems, and methods of reducing chip select | Paul D. Ruby, Anand S. Ramalingam, Rajesh Sundaram, Julie M. Walker | 2016-10-25 |
| 9298545 | Data protection across multiple memory blocks | Sampath K. Ratnam, Troy D. Larsen, Troy A. Manning, Martin L. Culley | 2016-03-29 |
| 9257162 | Alternate control settings | Julie M. Walker | 2016-02-09 |
| 9230666 | Drain select gate voltage management | Akira Goda, Pranav Kalavade | 2016-01-05 |
| 9142271 | Reference architecture in a cross-point memory | Balaji Srinivasan, Derchang Kau, Matthew Goldman | 2015-09-22 |
| 9136873 | Reduced uncorrectable memory errors | Kiran Pangal, Prashant S. Damle, Rajesh Sundaram, Shekoufeh Qawami, Julie M. Walker | 2015-09-15 |
| 9030906 | Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell | Prashant S. Damle, Raymond W. Zeng | 2015-05-12 |
| 8982661 | Flexible identification technique | Julie M. Walker | 2015-03-17 |