Issued Patents All Time
Showing 1–25 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431174 | Fuse delay of a command in a memory package | Lawrence D. Smith, James S. Rehmeyer | 2025-09-30 |
| 12419044 | Antifuse device having interconnect jumper | James S. Rehmeyer | 2025-09-16 |
| 12362259 | Management of heat on a semiconductor device and methods for producing the same | James S. Rehmeyer | 2025-07-15 |
| 12242346 | Global column repair with local column decoder circuitry, and related apparatuses, methods, and computing systems | Fatma Arzum Simsek-Ege | 2025-03-04 |
| 12223099 | Unused redundant enable disturb protection circuit | Seth A. Eichmeyer, Matthew D. Jenkinson | 2025-02-11 |
| 12217788 | Apparatuses and methods for controlling sense amplifier operation | John P. Behrend | 2025-02-04 |
| 12131040 | Delay of initialization at memory die | James S. Rehmeyer | 2024-10-29 |
| 12079076 | Apparatuses, systems, and methods for error correction | Yoshinori Fujiwara, Vivek Kotti, Jason Johnson, Kevin G. Werhane | 2024-09-03 |
| 12073108 | Memory placement in a computing system | James S. Rehmeyer | 2024-08-27 |
| 12001356 | Delay elements for command timing in a memory device | James S. Rehmeyer | 2024-06-04 |
| 11954338 | Shared components in fuse match logic | James S. Rehmeyer | 2024-04-09 |
| 11948655 | Indicating a blocked repair operation | Seth A. Eichmeyer, Matthew D. Jenkinson, Matthew A. Prather | 2024-04-02 |
| 11948657 | Sense amplifier layout designs and related apparatuses and methods | Eric J. Schultz | 2024-04-02 |
| 11948660 | Fuse delay of a command in a memory package | Lawrence D. Smith, James S. Rehmeyer | 2024-04-02 |
| 11929139 | Methods for optimizing semiconductor device placement on a substrate for improved performance, and associated systems and methods | James S. Rehmeyer | 2024-03-12 |
| 11930636 | Transistor antifuse, and related devices, systems, and methods | James S. Rehmeyer, Toshihiko Miyashita | 2024-03-12 |
| 11887649 | Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems | James S. Rehmeyer | 2024-01-30 |
| 11877445 | Integrated assemblies and semiconductor memory devices | Sangmin Hwang, Kyuseok Lee | 2024-01-16 |
| 11869620 | Selectable fuse sets, and related methods, devices, and systems | James S. Rehmeyer, Seth A. Eichmeyer | 2024-01-09 |
| 11869826 | Management of heat on a semiconductor device and methods for producing the same | James S. Rehmeyer | 2024-01-09 |
| 11829243 | Error evaluation for a memory system | Matthew D. Jenkinson, Seth A. Eichmeyer | 2023-11-28 |
| 11694762 | Memory device with a memory repair mechanism and methods for operating the same | James S. Rehmeyer, Seth A. Eichmeyer | 2023-07-04 |
| 11669447 | Modifying subsets of memory bank operating parameters | Alan J. Wilson | 2023-06-06 |
| 11645134 | Apparatuses and methods for fuse error detection | Daniel S. Miller, Kevin G. Werhane, Yoshinori Fujiwara, Jason Johnson, Minoru Someya | 2023-05-09 |
| 11557367 | Modifying memory bank operating parameters | Alan J. Wilson | 2023-01-17 |