CT

Chanh Tran

RA Rambus: 20 patents #101 of 549Top 20%
Overall (All Time): #222,658 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9870982 Distributed on-chip decoupling apparatus and method using package interconnect David A. Secker, Ling Yang, Ying Ji 2018-01-16
9466568 Distributed on-chip decoupling apparatus and method using package interconnect David A. Secker, Ling Yang, Ying Ji 2016-10-11
9006907 Distributed on-chip decoupling apparatus and method using package interconnect David A. Secker, Ling Yang, Ying Ji 2015-04-14
8458426 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2013-06-04
8378699 Self-test method for interface circuit Bret G. Stott, Philip Yeung, John Brooks, Benedict Lau, Eugene C. Ho 2013-02-19
8086812 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2011-12-27
7535242 Interface test circuit Bret G. Stott, Philip Yeung, John Brooks, Benedict Lau, Eugene C. Ho 2009-05-19
7308065 Delay locked loop circuitry for clock delay adjustment Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more 2007-12-11
7124270 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2006-10-17
7088127 Adaptive impedance output driver circuit Huy M. Ngyuen 2006-08-08
7065622 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2006-06-20
7039147 Delay locked loop circuitry for clock delay adjustment Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more 2006-05-02
7010658 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2006-03-07
6819137 Technique for voltage level shifting in input circuitry Yueyong Wang, Jade M. Kizer, Benedict Lau 2004-11-16
6809569 Circuit, apparatus and method having a cross-coupled load with current mirrors Yueyong Wang 2004-10-26
6803823 Circuit, apparatus and method for an adaptive voltage swing limiter Yueyong Wang 2004-10-12
6643752 Transceiver with latency alignment circuitry Kevin S. Donnelly, Mark G. Johnson, John B. Dillon 2003-11-04
6539072 Delay locked loop circuitry for clock delay adjustment Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more 2003-03-25
6125157 Delay-locked loop circuitry for clock delay adjustment Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +6 more 2000-09-26
5959481 Bus driver circuit including a slew rate indicator circuit having a one shot circuit Kevin S. Donnelly, Michael Ching, Bruno W. Garlepp 1999-09-28