AN

Anshuman Nayak

AT Atrenta: 5 patents #4 of 68Top 6%
AM AMD: 1 patents #5,683 of 9,279Top 65%
Northwestern University: 1 patents #1,629 of 3,846Top 45%
SY Synopsys: 1 patents #1,143 of 2,302Top 50%
📍 San Jose, CA: #7,614 of 32,062 inventorsTop 25%
🗺 California: #73,997 of 386,348 inventorsTop 20%
Overall (All Time): #641,736 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
9547735 System and method for viewing and modifying configurable RTL modules Samantak Chakrabarti, Nilam Sachan, Nitin Bhardwaj, Brijesh Agrawal, Nishant Sharma 2017-01-17
8930863 System and method for altering circuit design hierarchy to optimize routing and power distribution using initial RTL-level circuit description netlist Samantak Chakrabarti, Brijesh Agrawal, Nilam Sachan 2015-01-06
8813003 System and method for inferring higher level descriptions from RTL topology based on naming similarities and dependency Samantak Chakrabarti, Brijesh Agrawal, Nitin Bhardwaj 2014-08-19
8782587 Systems and methods for generating a higher level description of a circuit design based on connectivity strengths Samantak Chakrabarti, Brijesh Agrawal, Chandrakanti Vamshi Krishna 2014-07-15
8656335 System and methods for inferring higher level descriptions from RTL topology based on connectivity propagation Samantak Chakrabarti, Brijesh Agrawal, Nitin Bhardwaj 2014-02-18
8589835 System and method for inferring higher level descriptions from RTL topology based on naming similarities and dependency Samantak Chakrabarti, Brijesh Agrawal, Nitin Bhardwaj 2013-11-19
7376939 System for architecture and resource specification and methods to compile the specification onto hardware Malay Haldar, Alok Choudhary, Vikram Saxena, Prithviraj Banerjee 2008-05-20
7000213 Method and apparatus for automatically generating hardware from algorithms described in MATLAB Prithviraj Banerjee, Alok Choudhary, Malay Haldar 2006-02-14