Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12026202 | Memory optimization for storing objects in nested hash maps used in electronic design automation systems | Abhishek Verma, Deepak P. Ahuja, Paras Mal Jain | 2024-07-02 |
| 9547735 | System and method for viewing and modifying configurable RTL modules | Anshuman Nayak, Samantak Chakrabarti, Nilam Sachan, Nitin Bhardwaj, Nishant Sharma | 2017-01-17 |
| 8930863 | System and method for altering circuit design hierarchy to optimize routing and power distribution using initial RTL-level circuit description netlist | Anshuman Nayak, Samantak Chakrabarti, Nilam Sachan | 2015-01-06 |
| 8813003 | System and method for inferring higher level descriptions from RTL topology based on naming similarities and dependency | Anshuman Nayak, Samantak Chakrabarti, Nitin Bhardwaj | 2014-08-19 |
| 8782587 | Systems and methods for generating a higher level description of a circuit design based on connectivity strengths | Anshuman Nayak, Samantak Chakrabarti, Chandrakanti Vamshi Krishna | 2014-07-15 |
| 8656335 | System and methods for inferring higher level descriptions from RTL topology based on connectivity propagation | Anshuman Nayak, Samantak Chakrabarti, Nitin Bhardwaj | 2014-02-18 |
| 8589835 | System and method for inferring higher level descriptions from RTL topology based on naming similarities and dependency | Anshuman Nayak, Samantak Chakrabarti, Nitin Bhardwaj | 2013-11-19 |