Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12154027 | Increased precision neural processing element | Boris Bobrov, Kent D. Cedola, Chad B. McBride, George Petre, Larry Marvin Wall | 2024-11-26 |
| 11909422 | Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization | Joseph L. Corkery, Benjamin Eliot LUNDELL, Larry Marvin Wall, Chad B. McBride, George Petre +2 more | 2024-02-20 |
| 11750212 | Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook size | Aleksandar Tomic, Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall +1 more | 2023-09-05 |
| 11722147 | Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networks | Kent D. Cedola, Larry Marvin Wall, Boris Bobrov, George Petre, Chad B. McBride | 2023-08-08 |
| 11604972 | Increased precision neural processing element | Boris Bobrov, Kent D. Cedola, Chad B. McBride, George Petre, Larry Marvin Wall | 2023-03-14 |
| 11528033 | Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization | Joseph L. Corkery, Benjamin Eliot LUNDELL, Larry Marvin Wall, Chad B. McBride, George Petre +2 more | 2022-12-13 |
| 11526581 | Compression-encoding scheduled inputs for matrix computations | Shuayb M Zarar, Jun Zhang | 2022-12-13 |
| 11514648 | Aligning input image data with model input data to generate image annotations | Harpreet Singh Sawhney, Ning Xu, Moses Obadeji Olafenwa | 2022-11-29 |
| 11507349 | Neural processing element with single instruction multiple data (SIMD) compute lanes | Chad B. McBride, Boris Bobrov, Kent D. Cedola, George Petre, Larry Marvin Wall | 2022-11-22 |
| 11493985 | Selectively controlling memory power for scheduled computations | Shuayb M Zarar, Jun Zhang | 2022-11-08 |
| 11494237 | Managing workloads of a deep neural network processor | Chad B. McBride, Boris Bobrov, Kent D. Cedola, George Petre, Larry Marvin Wall | 2022-11-08 |
| 11487342 | Reducing power consumption in a neural network environment using data management | Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall | 2022-11-01 |
| 11476869 | Dynamically partitioning workload in a deep neural network module to reduce power consumption | Boris Bobrov, Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall | 2022-10-18 |
| 11405051 | Enhancing processing performance of artificial intelligence/machine hardware by data sharing and distribution as well as reuse of data in neuron buffer/line buffer | Chad B. McBride, Kent D. Cedola, Boris Bobrov, George Petre, Larry Marvin Wall | 2022-08-02 |
| 11341399 | Reducing power consumption in a neural network processor by skipping processing operations | Chad B. McBride, George Petre, Larry Marvin Wall, Kent D. Cedola, Boris Bobrov | 2022-05-24 |
| 11256976 | Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networks | Kent D. Cedola, Larry Marvin Wall, Boris Bobrov, George Petre, Chad B. McBride | 2022-02-22 |
| 11205118 | Power-efficient deep neural network module configured for parallel kernel and parallel input processing | Chad B. McBride, George Petre, Larry Marvin Wall, Kent D. Cedola, Boris Bobrov | 2021-12-21 |
| 11182667 | Minimizing memory reads and increasing performance by leveraging aligned blob data in a processing unit of a neural network environment | George Petre, Chad B. McBride, Kent D. Cedola, Larry Marvin Wall, Boris Bobrov | 2021-11-23 |
| 11176448 | Enhancing processing performance of a DNN module by bandwidth control of fabric interface | Chad B. McBride, Timothy H. Heil, George Petre, Kent D. Cedola, Larry Marvin Wall +1 more | 2021-11-16 |
| 11132845 | Real-world object recognition for computing device | Harpreet Singh Sawhney, Andrey Konin, Bilha-Catherine W. Githinji, William Douglas Guyman, Muhammad Zeeshan Zia +3 more | 2021-09-28 |
| 11100390 | Power-efficient deep neural network module configured for layer and operation fencing and dependency management | Chad B. McBride, Kent D. Cedola, George Petre, Larry Marvin Wall, Boris Bobrov | 2021-08-24 |
| 11100391 | Power-efficient deep neural network module configured for executing a layer descriptor list | Kent D. Cedola, Larry Marvin Wall, Boris Bobrov, George Petre, Chad B. McBride | 2021-08-24 |
| 11030131 | Data processing performance enhancement for neural networks using a virtualized data iterator | Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall, Boris Bobrov | 2021-06-08 |
| 11010315 | Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook size | Aleksandar Tomic, Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall +1 more | 2021-05-18 |
| 10996739 | Reducing power consumption in a neural network environment using data management | Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall | 2021-05-04 |