Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11947458 | Using cache coherent FPGAS to track dirty cache lines | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2024-04-02 |
| 11231949 | Using cache coherent FPGAS to accelerate post-copy migration | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2022-01-25 |
| 11221767 | Cache line persistence indicator for non-volatile memory using coherence states | Irina Calciu | 2022-01-11 |
| 11126464 | Using cache coherent FPGAS to accelerate remote memory write-back | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2021-09-21 |
| 11099991 | Programming interfaces for accurate dirty data tracking | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2021-08-24 |
| 11099871 | Using cache coherent FPGAS to accelerate live migration of virtual machines | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2021-08-24 |
| 11074181 | Dirty data tracking in persistent memory systems | Vijaychidambaram Velayudhan Pillai | 2021-07-27 |
| 11068400 | Failure-atomic logging for persistent memory systems with cache-coherent FPGAs | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2021-07-20 |
| 10929295 | Accelerating replication of page tables for multi-socket machines | Jayneel Gandhi, Pratap Subrahmanyam, Irina Calciu | 2021-02-23 |
| 10846222 | Dirty data tracking in persistent memory systems | Vijaychidambaram Velayudhan Pillai | 2020-11-24 |
| 10817389 | Failure-atomic persistent memory logging using binary translation | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2020-10-27 |
| 10761984 | Using cache coherent FPGAS to accelerate remote access | Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam | 2020-09-01 |
| 10430186 | Speeding up transactions in non-volatile memory using hardware transactional memory | Irina Calciu, Jayneel Gandhi, Pradeep Fernando | 2019-10-01 |
| 10042776 | Prefetching based upon return addresses | Ali Ghassan Saidi, Thomas Friedrich Wenisch | 2018-08-07 |
| 9946492 | Controlling persistent writes to non-volatile memory based on persist buffer data and a persist barrier within a sequence of program instructions | Stephan Diestelhorst, Ali Ghassan Saidi, Peter M. Chen, Thomas Friedrich Wenisch | 2018-04-17 |