Issued Patents All Time
Showing 126–150 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5883409 | EEPROM with split gate source side injection | Gheorghe Samachisa, Yupin Fong, Eliyahou Harari | 1999-03-16 |
| 5847425 | Dense vertical programmable read only memory cell structures and processes for making them | Jack Yuan, Gheorghe Samachisa, Eliyahou Harari | 1998-12-08 |
| 5847996 | Eeprom with split gate source side injection | Gheorghe Samachisa, Yupin Fong, Eliyahou Harari | 1998-12-08 |
| 5798968 | Plane decode/virtual sector architecture | Douglas J. Lee, Sanjay Mehrotra, Mehrdad Mofidi | 1998-08-25 |
| 5776810 | Method for forming EEPROM with split gate source side injection | Gheorghe Samachisa, Yupin Fong, Eliyahou Harari | 1998-07-07 |
| 5712180 | EEPROM with split gate source side injection | Gheorghe Samachisa, Yupin Fong | 1998-01-27 |
| 5657332 | Soft errors handling in EEPROM devices | Daniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert Norman, Sanjay Mehrotra | 1997-08-12 |
| 5532962 | Soft errors handling in EEPROM devices | Daniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert Norman, Sanjay Mehrotra | 1996-07-02 |
| 5512505 | Method of making dense vertical programmable read only memory cell structure | Jack Yuan, Gheorghe Samachisa, Eliyahou Harari | 1996-04-30 |
| 5504760 | Mixed data encoding EEPROM system | Eliyahou Harari, Sanjay Mehrotra, Stephen J. Gross, Robert Norman | 1996-04-02 |
| 5396468 | Streamlined write operation for EEPROM system | Eliyahou Harari, Sanjay Mehrotra, Stephen J. Gross, John S. Mangan | 1995-03-07 |
| 5380672 | Dense vertical programmable read only memory cell structures and processes for making them | Jack Yuan, Gheorghe Samachisa, Eliyahou Harari | 1995-01-10 |
| 5369615 | Method for optimum erasing of EEPROM | Eliyahou Harari, Sanjay Mehrotra, Stephen J. Gross | 1994-11-29 |
| 5343063 | Dense vertical programmable read only memory cell structure and processes for making them | Jack Yuan, Gheorghe Samachisa, Eliyahou Harari | 1994-08-30 |
| 5324676 | Method for forming a dual thickness dielectric floating gate memory cell | — | 1994-06-28 |
| 5313421 | EEPROM with split gate source side injection | Gheorghe Samachisa, Yupin Fong, Eliyahou Harrai | 1994-05-17 |
| 5270979 | Method for optimum erasing of EEPROM | Eliyahou Harari, Sanjay Mehrotra, Stephen J. Gross | 1993-12-14 |
| 5153691 | Apparatus for a dual thickness floating gate memory cell | — | 1992-10-06 |
| 4980859 | NOVRAM cell using two differential decouplable nonvolatile memory elements | Isao Nojima, Ping-Wei Wang | 1990-12-25 |
| 4752912 | Nonvolatile electrically alterable memory and method | — | 1988-06-21 |
| 4609833 | Simple NMOS voltage reference circuit | — | 1986-09-02 |
| 4599706 | Nonvolatile electrically alterable memory | — | 1986-07-08 |
| 4590504 | Nonvolatile MOS memory cell with tunneling element | — | 1986-05-20 |
| 4545035 | Dynamic RAM with nonvolatile shadow memory | Ching-Lin Jiang | 1985-10-01 |
| 4527258 | E.sup.2 PROM having bulk storage | — | 1985-07-02 |