YS

Yoshiko H. Strunk

VT Vlsi Technology: 1 patents #349 of 594Top 60%
📍 Sunnyvale, CA: #10,174 of 14,302 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,828,466 of 4,157,543Top 95%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5227320 Method for producing gate overlapped lightly doped drain (GOLDD) structure for submicron transistor Eric A. Johnson, Ying-Tsong Loh, Chung S. Wang 1993-07-13