Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8564345 | Digitally controlled delay lines with fine grain and coarse grain delay elements, and methods and systems to adjust in fine grain increments | — | 2013-10-22 |
| 7356676 | Extracting aligned data from two source registers without shifting by executing coprocessor instruction with mode bit for deriving offset from immediate or register | Nigel C. Paver, Murli Ganeshan | 2008-04-08 |
| 7047393 | Coprocessor processing instruction with coprocessor ID to broadcast main processor register data element to coprocessor multi-element register | Nigel C. Paver, Murli Ganeshan | 2006-05-16 |
| 6986023 | Conditional execution of coprocessor instruction based on main processor arithmetic flags | Nigel C. Paver, William T. Maghielse, Jianwei Liu, Anthony Jebson, Kailesh B. Bavaria +6 more | 2006-01-10 |
| 6373912 | Phase-locked loop arrangement with fast lock mode | — | 2002-04-16 |
| 6226216 | Sectional column activated memory | — | 2001-05-01 |