Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9267985 | Bond and probe pad distribution | — | 2016-02-23 |
| 9202772 | Heat pipe in overmolded flip chip package | — | 2015-12-01 |
| 8772085 | Integrated circuit package architecture | — | 2014-07-08 |
| 8148813 | Integrated circuit package architecture | — | 2012-04-03 |
| 8003984 | Reticle for wafer test structure areas | — | 2011-08-23 |
| 7316935 | Reticle for layout modification of wafer test structure areas | — | 2008-01-08 |
| 7212032 | Method and apparatus for monitoring yield of integrated circuits | Jayabrata Ghosh Dastidar, Laiq Chughtai | 2007-05-01 |
| 6982566 | Method and apparatus for operating a burn-in board to achieve lower equilibrium temperature and to minimize thermal runaway | Mohammed Didarul Alam | 2006-01-03 |
| 6967111 | Techniques for reticle layout to modify wafer test structure area | — | 2005-11-22 |
| 6956165 | Underfill for maximum flip chip package reliability | Christopher J. Pass | 2005-10-18 |
| 6030425 | Catalytic acceleration and electrical bias control of CMP processing | — | 2000-02-29 |
| 5948697 | Catalytic acceleration and electrical bias control of CMP processing | — | 1999-09-07 |
| 5880015 | Method of producing stepped wall interconnects and gates | — | 1999-03-09 |
| 5366848 | Method of producing submicron contacts with unique etched slopes | Nathan Thane | 1994-11-22 |