Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12253947 | Technologies for configuration of memory ranges | Yen-Cheng Liu | 2025-03-18 |
| 11966330 | Link affinitization to reduce transfer latency | Jeffrey D. Chamberlain, Yen-Cheng Liu, Eswaramoorthi Nallusamy, Soumya S. Eachempati | 2024-04-23 |