Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7289382 | Rewritable fuse memory | — | 2007-10-30 |
| 6903581 | Output buffer for high and low voltage bus | Lawrence T. Clark | 2005-06-07 |
| 6512401 | Output buffer for high and low voltage bus | Lawrence T. Clark | 2003-01-28 |
| 6493935 | Interleaving a bondwire between two bondwires coupled to a same terminal | — | 2002-12-17 |
| 6266793 | JTAG boundary scan cell with enhanced testability feature | Orlando Davila, Christopher P. McAllister | 2001-07-24 |
| 6247136 | Method and apparatus for capturing data from a non-source synchronous component in a source synchronous environment | Peter D. MacWilliams, Harry Muljono | 2001-06-12 |
| 6051890 | Interleaving a bondwire between two bondwires coupled to a same terminal | — | 2000-04-18 |
| 6020631 | Method and apparatus for connecting a bondwire to a bondring near a via | — | 2000-02-01 |
| 5774001 | Method for eliminating multiple output switching timing skews in a source synchronous design | Harry Muljono | 1998-06-30 |
| 5726860 | Method and apparatus to reduce cavity size and the bondwire length in three tier PGA packages by interdigitating the VCC/VSS | — | 1998-03-10 |
| 5723995 | Method for eliminating process variation timing skews in a source synchronous design | Harry Muljono | 1998-03-03 |
| 5706484 | Method for eliminating transition direction sensitive timing skews in a source synchronous design | Harry Muljono | 1998-01-06 |
| 5537656 | Method and apparatus for a microprocessor to enter and exit a reduced power consumption state | Larry E. Mosley | 1996-07-16 |