Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10725919 | Processors having virtually clustered cores and cache slices | Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more | 2020-07-28 |
| 10725920 | Processors having virtually clustered cores and cache slices | Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more | 2020-07-28 |
| 10705960 | Processors having virtually clustered cores and cache slices | Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more | 2020-07-07 |
| 10073779 | Processors having virtually clustered cores and cache slices | Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more | 2018-09-11 |
| 8943379 | Retry based protocol with source/receiver FIFO recovery and anti-starvation mechanism to support dynamic pipeline lengthening for ECC error correction | James Vash, Danielle N. Devereaux, Robert E. Faber | 2015-01-27 |