Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9093170 | Multi-level cell (MLC) non-volatile memory data reading method and apparatus | — | 2015-07-28 |
| 9043681 | Reconstructing codewords using a side channel | Pranav Kalavade | 2015-05-26 |
| 9037943 | Identification of non-volatile memory die for use in remedial action | Kiran Pangal | 2015-05-19 |
| 8959407 | Scaling factors for hard decision reads of codewords distributed across die | Kiran Pangal | 2015-02-17 |
| 8943385 | NAND memory management | Pranav Kalavade | 2015-01-27 |
| 8804421 | Center read reference voltage determination based on estimated probability density function | — | 2014-08-12 |
| 8667360 | Apparatus, system, and method for generating and decoding a longer linear block codeword using a shorter block length | — | 2014-03-04 |
| 8549380 | Non-volatile memory error mitigation | — | 2013-10-01 |
| 8549382 | Storage drive with LDPC coding | — | 2013-10-01 |
| 8473828 | Minimal hardware implementation of non-parity and parity trellis | — | 2013-06-25 |
| 8091009 | Symbol by symbol map detection for signals corrupted by colored and/or signal dependent noise | — | 2012-01-03 |
| 7733590 | Optimal synchronization mark/address mark construction | — | 2010-06-08 |
| 7689896 | Minimal hardware implementation of non-parity and parity trellis | — | 2010-03-30 |