Issued Patents All Time
Showing 101–113 of 113 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8144864 | Method for speeding up the computations for characteristic 2 elliptic curve cryptographic systems | Shay Gueron | 2012-03-27 |
| 7991152 | Speeding up Galois Counter Mode (GCM) computations | Shay Gueron | 2011-08-02 |
| 7958436 | Performing a cyclic redundancy checksum operation responsive to a user-level instruction | Steven R. King, Frank L. Berry | 2011-06-07 |
| 7886214 | Determining a message residue | Vinodh Gopal, Gilbert M. Wolrich | 2011-02-08 |
| 7844655 | System, method and apparatus for multiplying large numbers in a single iteration using graphs | Arun Raghunath | 2010-11-30 |
| 7826612 | System, method and apparatus for an incremental modular process including modular multiplication and modular eduction | Arun Raghunath | 2010-11-02 |
| 7707483 | Technique for performing cyclic redundancy code error detection | — | 2010-04-27 |
| 7646779 | Hierarchical packet scheduler using hole-filling and multiple packet buffering | Alok Kumar, Raj Yavatkar | 2010-01-12 |
| 7590930 | Instructions for performing modulo-2 multiplication and bit reflection | — | 2009-09-15 |
| 7525958 | Apparatus and method for two-stage packet classification using most specific filter matching and transport level sharing | Alok Kumar, Raj Yavatkar, Prashant R. Chandra, Sridhar Lakshmanamurthy, Chen-Chi Kuo +1 more | 2009-04-28 |
| 7525962 | Reducing memory access bandwidth consumption in a hierarchical packet scheduler | Alok Kumar, Raj Yavatkar | 2009-04-28 |
| 7457296 | Method and apparatus for sorting packets in packet schedulers using a connected trie data structure | Alok Kumar, Raj Yavatkar | 2008-11-25 |
| 7408932 | Method and apparatus for two-stage packet classification using most specific filter matching and transport level sharing | Alok Kumar, Raj Yavatkar, Harrick Mayank Vin | 2008-08-05 |