Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5532915 | Method and apparatus for providing an ultra low power regulated negative charge pump | Dimitris Pantelakis, Johnny Javanifard, George R. Canepa | 1996-07-02 |
| 5524266 | System having multiple phase boosted charge pump with a plurality of stages | Jahanshir J. Javanifard, Cesar Galindo | 1996-06-04 |
| 5497119 | High precision voltage regulation circuit for programming multilevel flash memory | Stephen N. Keeney, Albert Fazio, Gregory E. Atwood, Johnny Javanifard, Kenneth Woiciechowski | 1996-03-05 |
| 5455794 | Method and apparatus for controlling the output current provided by a charge pump circuit | Jahanshir J. Javanifard, Albert Fazio, Robert E. Larsen, James Brennan, Jr. | 1995-10-03 |
| 5446408 | Method and apparatus for providing selectable sources of voltage | Jahanshir J. Javanifard, Mase J. Taub | 1995-08-29 |
| 5442586 | Method and apparatus for controlling the output current provided by a charge pump circuit | Jahanshir J. Javanifard, Albert Fazio, Robert E. Larsen, James Brennan, Jr. | 1995-08-15 |
| 5432469 | Method and apparatus for a two phase bootstrap charge pump | Jahanshir J. Javanifard, Cesar Galindo | 1995-07-11 |
| 5430402 | Method and apparatus for providing selectable sources of voltage | Jahanshir J. Javanifard, Mase J. Taub | 1995-07-04 |
| 5426391 | Method and apparatus for providing selectable sources of voltage | Jahanshir J. Javanifard, Mase J. Taub | 1995-06-20 |
| 5422586 | Apparatus for a two phase bootstrap charge pump | Jahanshir J. Javanifard, Cesar Galindo | 1995-06-06 |
| 5414669 | Method and apparatus for programming and erasing flash EEPROM memory arrays utilizing a charge pump circuit | Robert E. Larsen, Chaitanya Rajguru, Cesar Galindo, Jahanshir J. Jayanifard, Mase J. Taub | 1995-05-09 |
| 5339272 | Precision voltage reference | Mase J. Taub, Neal R. Mielke | 1994-08-16 |
| 5306963 | Address transition detection noise filter in pulse summation circuit for nonvolatile semiconductor memory | David A. Leak, Sachidanandan Sambandan | 1994-04-26 |