JG

John I. Garney

IN Intel: 70 patents #383 of 30,777Top 2%
MC Mcci: 2 patents #3 of 11Top 30%
📍 Portland, OR: #206 of 9,213 inventorsTop 3%
🗺 Oregon: #395 of 28,073 inventorsTop 2%
Overall (All Time): #27,890 of 4,157,543Top 1%
72
Patents All Time

Issued Patents All Time

Showing 26–50 of 72 patents

Patent #TitleCo-InventorsDate
7277993 Write-back disk cache 2007-10-02
7260672 Using data stored in a destructive-read memory 2007-08-21
7231497 Merging write-back and write-through cache policies Sanjeev N. Trika, Michael K. Eschmann 2007-06-12
7228406 Interacting with optional read-only memory 2007-06-05
7185120 Apparatus for period promotion avoidance for hubs Brian Leete 2007-02-27
7168026 Method and apparatus for preservation of failure state in a read destructive memory Robert W. Faber, Rick Coulson 2007-01-23
7158532 Half duplex link with isochronous and asynchronous arbitration Brent S. Baxter 2007-01-02
7152125 Dynamic master/slave configuration for multiple expansion modules Robert J. Royer, Jr. 2006-12-19
7130962 Writing cache lines on a disk drive 2006-10-31
7085878 Transportation of main memory and intermediate memory contents Robert J. Royer, Jr. 2006-08-01
7007110 Nak throttling for USB host controllers John S. Howard 2006-02-28
6952429 Transaction scheduling for a bus system in a multiple speed environment John S. Howard 2005-10-04
6925015 Stacked memory device having shared bitlines and method of making the same David Chow, Rick Coulson 2005-08-02
6920533 System boot time reduction method Richard Coulson, Jeanna N. Matthews, Robert J. Royer, Jr. 2005-07-19
6889265 Apparatus and method to allow and synchronize schedule changes in a USB enhanced host controller Brian Leete 2005-05-03
6886062 Method and apparatus for improving time constraints and extending limited length cables in a multiple-speed bus 2005-04-26
6813251 Split Transaction protocol for a bus system John S. Howard 2004-11-02
6792495 Transaction scheduling for a bus system John S. Howard 2004-09-14
6782484 Method and apparatus for lossless resume capability with peripheral devices Steve McGowan 2004-08-24
6771664 Transaction scheduling for a bus system in a multiple speed environment John S. Howard 2004-08-03
6728801 Method and apparatus for period promotion avoidance for hubs Brian Leete 2004-04-27
6678761 Method and apparatus for budget development under universal serial bus protocol in a multiple speed transmission environment John S. Howard 2004-01-13
6630931 Generation of stereoscopic displays using image approximation Sanjeev N. Trika 2003-10-07
6629186 Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment John S. Howard, Venkat Iyer 2003-09-30
6546018 Digital system having a peripheral bus structure with at least one store-and-forward segment John S. Howard, Venkat Iyer 2003-04-08