Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
HK

Harsh Kumar — 13 Patents

Broadcom: 6 patents #1,767 of 9,346Top 20%
Intel: 6 patents #6,200 of 30,777Top 25%
NVIDIA: 1 patents #4,387 of 7,811Top 60%
San Jose, CA: #5,025 of 32,062 inventorsTop 20%
California: #47,433 of 386,348 inventorsTop 15%
Overall (All Time): #362,438 of 4,157,543Top 9%
13 Patents All Time
Harsh Kumar has been granted 13 US patents while listed as an inventor at Intel. The first was granted in 1997 and the most recent in October 2025. Harsh Kumar ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list Harsh Kumar in San Jose, CA, US.

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12450048 Containerized application management Angshul MAJUMDAR, George Hicken 2025-10-21
12411761 Fully cache coherent virtual partitions in multitenant configurations in a multiprocessor system Adarsha Rao S J, Sanjay Deshpande, Raghuram L, Anirudh B K, Kun Fang 2025-09-09
11876671 Dynamic configuration of a cluster network in a virtualized computing system Yahya Cahyadi, George Hicken, Ian Hunter Gann, Nanda Kishore Krishna 2024-01-16
11809751 Image file optimizations by opportunistic sharing Benjamin J. Corrie 2023-11-07 $27,859,000
11262953 Image file optimizations by opportunistic sharing Benjamin J. Corrie 2022-03-01 $8,972,000
11144401 Component aware incremental backup, restore, and reconciliation solution Abhijit Seal, Md. Borhan Uddin, Sachin Kumar Tiwari 2021-10-12 $8,275,000
11108629 Dynamic configuration of a cluster network in a virtualized computing system Yahya Cahyadi, George Hicken, Ian Hunter Gann, Nanda Kishore Krishna 2021-08-31 $5,587,000
7219217 Apparatus and method for branch prediction utilizing a predictor combination in parallel with a global predictor Gunjeet Baweja 2007-05-15 $17,522,000
6848070 Error correcting code scheme 2005-01-25 $26,797,000
6332189 Branch prediction architecture Gunjeet Baweja 2001-12-18 $522,550,000
6247094 Cache memory architecture with on-chip tag array and off-chip data array Gunjeet Baweja, Cheng-Feng Chang, Tim Chan 2001-06-12 $172,053,000
6237064 Cache memory with reduced latency Gunjeet Baweja, Cheng-Feng Chang 2001-05-22 $176,958,000
5627788 Memory unit with bit line discharger Vincent Chang, Haluk Katircioglu, Nihar-Ranjan Mohapatra 1997-05-06 $112,956,000