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Manufacture of interconnects for integration of multiple integrated circuits |
Ning Cheng, Andy L. Lee |
2020-01-21 |
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Strain-enhanced transistors with adjustable layouts |
Girish Venkitachalam, Che Ta Hsu, Peter J. McElheny |
2017-04-25 |
| 9484411 |
Integrated circuit and a method to optimize strain inducing composites |
Girish Venkitachalam, Che Ta Hsu, Peter J. McElheny |
2016-11-01 |
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High-k dielectric device and process |
Che Ta Hsu, Ning Cheng, Jeffrey Tung |
2015-10-20 |
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Metal routing in advanced process technologies |
Ning Cheng, Andy L. Lee |
2015-08-04 |
| 8921217 |
Methods of forming gate structures for reduced leakage |
Wuu-Cherng Lin, Che Ta Hsu, Wen Wu |
2014-12-30 |
| 8912104 |
Method for fabricating integrated circuits with patterned thermal adjustment layers for design optimization |
Deepa Ratakonda, Christopher J. Pass, Che Ta Hsu, Wilson Wong |
2014-12-16 |
| 8835265 |
High-k dielectric device and process |
Che Ta Hsu, Ning Cheng, Jeffrey Tung |
2014-09-16 |
| 8765541 |
Integrated circuit and a method to optimize strain inducing composites |
Girish Venkitachalam, Che Ta Hsu, Peter J. McElheny |
2014-07-01 |
| 8664725 |
Strain enhanced transistors with adjustable layouts |
Girish Venkitachalam, Che Ta Hsu, Peter J. McElheny |
2014-03-04 |
| 8159044 |
Density transition zones for integrated circuits |
Shuxian Chen, Bradley Jensen, Yowjuang (Bill) Liu |
2012-04-17 |
| 7291546 |
Method and apparatus for reducing charge loss in a nonvolatile memory cell |
Irfan Rahim |
2007-11-06 |
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Bipolar transistors with low base resistance for CMOS integrated circuits |
Minchang Liang, Yow-Juang Liu |
2007-10-23 |
| 6972466 |
Bipolar transistors with low base resistance for CMOS integrated circuits |
Minchang Liang, Yow-Juang Liu |
2005-12-06 |
| 6773987 |
Method and apparatus for reducing charge loss in a nonvolatile memory cell |
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2004-08-10 |