CL

Chunlin Liang

IN Intel: 32 patents #1,134 of 30,777Top 4%
📍 San Jose, CA: #1,864 of 32,062 inventorsTop 6%
🗺 California: #15,733 of 386,348 inventorsTop 5%
Overall (All Time): #114,271 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 26–32 of 32 patents

Patent #TitleCo-InventorsDate
6180502 Self-aligned process for making asymmetric MOSFET using spacer gate technique 2001-01-30
6166417 Complementary metal gates and a process for implementation Gang Bai 2000-12-26
6133128 Method for patterning polysilicon gate layer based on a photodefinable hard mask process Siddhartha Das 2000-10-17
6130123 Method for making a complementary metal gate electrode technology Gang Bai 2000-10-10
6022815 Method of fabricating next-to-minimum-size transistor gate using mask-edge gate definition technique Brian S. Doyle, Peng Cheng, Qi-De Qian 2000-02-08
5972758 Pedestal isolated junction structure and method of manufacture 1999-10-26
5888897 Process for forming an integrated structure comprising a self-aligned via/contact and interconnect 1999-03-30